Part Details for CSD17483F4 by Honest Han

PMP11536 is a power bank reference design with a USB typc C DFP plus a USB type A port employing the boost mode of a Maxcharger. Fast charger input is also supported to save more charging time. It can detect the input port attach/detach events automatically: as well as the output ports.

This reference design aims at providing a generic solution for energy harvesting while giving a practical application application for thermoelectric generators (TEG). It is a fully programmable state-machine which runs at 60nA and can enable and disable key functions as they are needed by the system to optimize power consumption. TIDA-00246 acts as a BoosterPack for the MSP430FR5969 LaunchPad development kit (MSP-EXP430FR5969) for use as an ultra-low power state machine.For more information on  II-VI Marlow: click here.

The SimpleLink™ Bluetooth® Smart CC2650 uTag (or microtag) is an ultra-compact reference design for the SimpleLink CC26xx device family. The reference design is suitable for any Internet of Things (IoT) <fo

The PMP5670 -24.0V @ 300mA boost converter has an input voltage of -48V. It is designed to boost a negative input voltage to a lower negative output voltage.

This design for powering Xilinx Zynq UltraScale+ (www.xilinx.com/power) Remote Radio Heads (RRH) features the TPS6508640 and is a small and highly efficient solution. The PMIC reduces size, cost, and power loss by having integrated rails into 1 device, high switching frequency and separate rails for core supplies.

This design is for powering a small system attached to a smartphone audio jack.  The reference design includes a charge pump and a boost converter. The charge pump is used to filter AC input into a DC voltage and the ultra-low quiescent current boost converter TPS610981 is used to generate a stable 3.3V.

Typically in bus communication technologies: such as controller area network (CAN) and RS-485: the two farthest nodes in the network are terminated with 120Ω termination resistors and the other nodes are left unterminated. This process requires that the hardware designer know the layout of the end application: but that is not always the case: since the hardware designer is not necessarily the end user of the product.  TIDA-01238 documents and tests two individual circuits that make termination selectable at the individual CAN nodes: which makes placing termination at any node possible. Selectable termination takes the guess work out of network implementation by allowing any node to be the terminating node.

This advanced motor implements closed-loop speed control to maintain an exact RPM across the load torque profile.  The magnetic rotor position is sensed by the DRV5013 Hall-effect sensors, and the DRV8308 controller decides when to drive the CSD88537

This design demonstrates simple GU10 LED driver suolution using primary side sensing TPS92315. Non-isolated flyback topology is used in the design to achieve high efficiency(>82.3% typically) with reduced cost. The overall form factor is 26x16x11mm. Overall current cross regulation <+/-1.2%.

The TIDA-01227 reference design is a 15 V to 70 V stepper motor controller for bipolar applications. The design uses Texas Instrument’s DRV8711 Bipolar Stepper Motor Controller gate driver: CSD19538Q3A 100V: N-Channel NexFET Power MOSFET s: CSD17483F4 30V: N-Channel FemtoFET™ MOSFET: MSP430G2553 MCU: LM5107 100V / 1.4-A Peak Half Bridge Gate Driver: and LM5017 12 V buck converter. The focus of this design is to demonstrate use of the DRV8711 stepper motor controller to control stepper motors at voltages higher than 60V. The DRV8711 operates at 12V while using additional circuitry to convert to the high voltage control signals.

TIDA-01050 参考设计是为了改善通常与自动测试设备相关的集成、功耗、性能和时钟问题。该设计适用于任何 ATE 系统，但还是最适用于需要大量输入通道的系统。

PMP40001 is a full featured USB type-C PD DFP reference design. The pure analog configuration for the USB type-C source controller--TPS25740 makes the PD negotiation easy. It supports 3 sets of output voltage options including 5V/12V/20V.  The max output current is 3A which provides a maximal 60W output power @20Vo. This design's total efficiency can achieve 96% at full load by adopting the high performance buck-boost controller--LM5175: which also means a good thermal performance. The valid input voltage range is from 6V to 13.5V which is compatible with the 2S and 3S lithium battery pack.

CC2540 密钥卡参考设计包含在 CC2540DK-MINI 开发套件中。本设计中受 CC2540 控制的组件包括三轴加速计、蜂鸣器（用于发出报警声）、双色 LED 和两个按钮。设计可用作 CC2540 RC 演示的远程控制。参考设计演示了用于 CC2540 去耦和射频布局的精湛技术。为了实现最佳射频性能，这些部件应当被精确复制。这个 4 层参考设计具有离散不平衡变压器和紧凑曲折型倒 F PCB 天线。此天线是非常适用于 2.4GHz 频带的小型 PCB 天线。

This converter is used for Class 1 PoE PD applications where isolation is not required.  The TPS2378 PD controller plus LM5006 buck converter provide 5V/560mA with good efficieny in a small size.  The LM5006 can be configured with a diode rectifier for lowest cost or a synchronous FET r

TIDA-00179 is an EMC-compliant universal digital interface to connect to absolute position encoders like EnDat 2.2: BiSS®: SSI or HIPERFACE DSL®. This reference design supports a wide-input voltage range from 15 V to 60 V (24-V nom). A connector with 3.3-V logic I/O signals allows for direct interface to the host processor like Sitara AM437x or Delfino F28379 to run the corresponding master protocol.Master implementations are available on Sitara AM437x (EnDat2.2: BiSS and HIPERFACE DSL) or Delfino DesignDRIVE (EnDat2.2 and BiSS). This design allows the host processor to select between a 4-wire encoder interface like EnDat 2.2 and BiSS or a 2-wire interface with power over RS-485 like HIPERFACE DSL. To meet the selected encoder's supply range: the design offers a programmable output voltage with either 5.25 V or 11 V. The design's power supply offers protection against over-voltage and short circuit according to the selected encoder's voltage range to prevent damage during a cable short. TIDA-00179 has been tested up to 100-m cable length with EnDat 2.2 and 2-wire HIPERFACE DSL encoders.

PMP4496 is a power bank reference design with a single USB type C dual role port (DRP). It can perform as a SINK or SOURCE. Role is automatically determined according to the external device attached. Fast charger input is also supported to save more charging time.

For developers currently using an FPGA or ASIC to connect to high speed data converters who need faster time to market with increased performance and significant reduction in cost: power: and size this reference design includes the first widely available processor integrating a JESD204B interface and Digital Front End (DFE) processing. Connecting to the ADC12J4000 and DAC38J84 provides an efficient solution for Test & Measurement and Defense applications.