| Part Number | Manufacturer | Composite Price | Description | Compare |
|---|---|---|---|---|
| 74F112SC | National Semiconductor Corporation | Check for Price | J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDSO16 | SN74F112DR vs 74F112SC |
| N74F112D | NXP Semiconductors | Check for Price | J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDSO16 | SN74F112DR vs N74F112D |
| 74F112SC | Fairchild Semiconductor Corporation | Check for Price | J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDSO16 | SN74F112DR vs 74F112SC |
| I74F112D-T | YAGEO Corporation | Check for Price | J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDSO16 | SN74F112DR vs I74F112D-T |
| SN74F112DRE4 | Texas Instruments | Check for Price | J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDSO16 | SN74F112DR vs SN74F112DRE4 |
| 74F112SCX | Rochester Electronics LLC | Check for Price | J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDSO16 | SN74F112DR vs 74F112SCX |
| 74F112SC | Rochester Electronics LLC | Check for Price | J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDSO16 | SN74F112DR vs 74F112SC |
| I74F112D | NXP Semiconductors | Check for Price | J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDSO16 | SN74F112DR vs I74F112D |
| 74F112SC | Texas Instruments | Check for Price | J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDSO16 | SN74F112DR vs 74F112SC |
| 935025650602 | NXP Semiconductors | Check for Price | J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 1-Bit, Complementary Output, TTL, PDSO16 | SN74F112DR vs 935025650602 |
Part Details for SN74F112DR by Texas Instruments
Results Overview of SN74F112DR by Texas Instruments
- Distributor Offerings: (14 listings)
- Number of FFF Equivalents: (10 replacements)
- Tariff Estimator: (Available) NEW
- Number of Functional Equivalents: (10 options)
- CAD Models: (Available)
- Part Data Attributes: (Available)
- Reference Designs: (Not Available)
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
SN74F112DR Information
SN74F112DR by Texas Instruments is an FF/Latch.
FF/Latches are under the broader part category of Logic Components.
Digital logic governs the behavior of signals in electronic circuits, enabling complex decisions based on simple binary inputs (yes/no). Logic components perform operations from these signals. Read more about Logic Components on our Logic part category page.
Price & Stock for SN74F112DR
| Part # | Distributor | Description | Stock | Price | Buy | |
|---|---|---|---|---|---|---|
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DISTI #
SN74F112DR
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TME | IC: digital, non-inverting,inverting,JK flip-flop, Ch: 2, IN: 2 Min Qty: 2500 | 0 |
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$0.3350 | RFQ |
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DISTI #
86284235
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Verical | Flip Flop JK-Type Neg-Edge Push-Pull 2-Element 16-Pin SOIC T/R RoHS: Compliant Min Qty: 792 Package Multiple: 1 Date Code: 1201 | Americas - 18382 |
|
$0.3264 / $0.4738 | Buy Now |
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DISTI #
86282968
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Verical | Flip Flop JK-Type Neg-Edge Push-Pull 2-Element 16-Pin SOIC T/R RoHS: Compliant Min Qty: 792 Package Multiple: 1 Date Code: 0601 | Americas - 2500 |
|
$0.3264 / $0.4738 | Buy Now |
|
DISTI #
595-SN74F112DR
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Mouser Electronics | Flip Flops Dual Neg-Edge-Trig J -K Flip-Flop A 595- A 595-SN74F112D RoHS: Compliant | 2362 |
|
$0.4340 / $0.9400 | Buy Now |
|
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Bristol Electronics | Flip Flop JK-Type Neg-Edge Push-Pull 2-Element 16-Pin SOIC T/R | 3281 |
|
RFQ | |
|
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Quest Components | IC,FLIP-FLOP,DUAL,J/K TYPE,F-TTL,SOP,16PIN,PLASTIC | 2828 |
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$0.2278 / $0.5466 | Buy Now |
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Quest Components | IC,FLIP-FLOP,DUAL,J/K TYPE,F-TTL,SOP,16PIN,PLASTIC | 830 |
|
$0.3044 / $0.7610 | Buy Now |
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Quest Components | IC,FLIP-FLOP,DUAL,J/K TYPE,F-TTL,SOP,16PIN,PLASTIC | 160 |
|
$0.4555 / $0.9110 | Buy Now |
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Rochester Electronics | J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDSO16 RoHS: Compliant Status: Active Min Qty: 1 | 20882 |
|
$0.2611 / $0.4211 | Buy Now |
|
DISTI #
86284235
|
Verical | Flip Flop JK-Type Neg-Edge Push-Pull 2-Element 16-Pin SOIC T/R RoHS: Compliant Min Qty: 792 Package Multiple: 1 Date Code: 1201 | Americas - 18382 |
|
$0.3264 / $0.4738 | Buy Now |
US Tariff Estimator: SN74F112DR by Texas Instruments
Calculations from this tool are estimations only for imports into the United States. Please refer to the distributor or manufacturer and reference official US government sources and authorities to verify any final purchase costs.
SN74F112DR CAD Models
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SN74F112DR Part Data Attributes
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SN74F112DR
Texas Instruments
Buy Now
Datasheet
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SN74F112DR
Texas Instruments
J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDSO16
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| Pbfree Code | Yes | |
| Rohs Code | Yes | |
| Part Life Cycle Code | Active | |
| Part Package Code | SOIC | |
| Package Description | Soic-16 | |
| Pin Count | 16 | |
| ECCN Code | EAR99 | |
| HTS Code | 8542.39.00.90 | |
| Family | F/Fast | |
| JESD-30 Code | R-PDSO-G16 | |
| JESD-609 Code | e4 | |
| Length | 9.9 Mm | |
| Load Capacitance (CL) | 50 Pf | |
| Logic IC Type | J-K Flip-Flop | |
| Max Frequency@Nom-Sup | 100000000 Hz | |
| Max I(ol) | 0.02 A | |
| Moisture Sensitivity Level | 1 | |
| Number of Bits | 2 | |
| Number of Functions | 2 | |
| Number of Terminals | 16 | |
| Operating Temperature-Max | 70 °C | |
| Operating Temperature-Min | ||
| Output Polarity | Complementary | |
| Package Body Material | Plastic/Epoxy | |
| Package Code | SOP | |
| Package Equivalence Code | SOP16,.25 | |
| Package Shape | Rectangular | |
| Package Style | Small Outline | |
| Packing Method | Tr | |
| Peak Reflow Temperature (Cel) | 260 | |
| Power Supply Current-Max (ICC) | 19 Ma | |
| Prop. Delay@Nom-Sup | 7.5 Ns | |
| Propagation Delay (tpd) | 7.5 Ns | |
| Qualification Status | Not Qualified | |
| Schmitt Trigger | No | |
| Seated Height-Max | 1.75 Mm | |
| Supply Voltage-Max (Vsup) | 5.5 V | |
| Supply Voltage-Min (Vsup) | 4.5 V | |
| Supply Voltage-Nom (Vsup) | 5 V | |
| Surface Mount | Yes | |
| Technology | Ttl | |
| Temperature Grade | Commercial | |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) | |
| Terminal Form | Gull Wing | |
| Terminal Pitch | 1.27 Mm | |
| Terminal Position | Dual | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Trigger Type | Negative Edge | |
| Width | 3.9 Mm | |
| fmax-Min | 100 Mhz |
Alternate Parts for SN74F112DR
This table gives cross-reference parts and alternative options found for SN74F112DR. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of SN74F112DR, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.
SN74F112DR Frequently Asked Questions (FAQ)
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The maximum operating frequency of the SN74F112DR is 100 MHz, but it can vary depending on the load capacitance and the output current.
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To ensure reliable operation in high-temperature environments, it is recommended to follow proper thermal management practices, such as providing adequate heat sinking and airflow, and ensuring that the device is operated within its specified temperature range (-40°C to 85°C).
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The recommended power-up sequence for the SN74F112DR is to apply power to the VCC pin before applying any input signals, and to ensure that the input signals are stable before applying clock signals.
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To handle ESD protection for the SN74F112DR, it is recommended to follow proper ESD handling practices, such as using ESD-protective packaging, handling the device by the body or pins, and using ESD-protective workstations and tools.
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The recommended layout and routing for the SN74F112DR involves keeping the input and output traces short and direct, avoiding parallel traces, and using a solid ground plane to reduce noise and EMI.