Part Details for TPS74201 by Texas Instruments

The RF sampling architecture offers an alternative to the traditional super-heterodyne architecture. An RF sampling analog-to-digital converter (ADC) operates at a high sampling rate and converts signals directly from radio frequencies (RF) to digital. Because of the high sampling rate: the RF sampling architecture supports very wide signal bandwidths. Higher signal bandwidths increase the capacity of the system allowing for faster data transmission or greater user access.The reference design features the ADC32RF45 which is a dual channel:14-bit resolution ADC sampling up to 3-GSPS. The maximum signal bandwidth is set by the ADC sampling rate divided by two. With this reference design the signal bandwidth capability exceeds 1-GHz. The maximum input frequency is set by the input bandwidth of the input buffers of the ADC and the input transformers. This reference design allows direct capture of RF signals up to 4-GHz which is suitable for all of the key telecommunication bands and S-band RADAR applications. The design includes an optimized clocking solution for maintaining the JESD204B serialized data interface and achieving the highest signal-to-noise ratio (SNR) performance.

This reference design and the associated example Verilog code can be used as a starting point for interfacing Altera FPGAs to Texas Instruments' high-speed LVDS-interface analog-to-digital converters (ADC) and digital-to-analog converters (DAC). The firmware implementation is explained and the required timing constraints are discussed.

In TIDA-00684 reference design a quad-channel TSW3080 evaluation module (EVM) is developed to shows how to use an active amplifier interface with the DAC38J84 to demonstrate an arbitrary-waveform-generator frontend. The DAC38J84 provides four DAC channels with 16 bits of resolution with a maximum update rate of 2.5 GSPS. The THS3217 provides a wideband differential-to-single-ended output. The THS3095 provides a high dynamic range output of up to 26 VP-P. The LMH5401 provides a very wideband differential output. All of these paths provide a DC-coupled interface with the ability to drive 50 Ω at a high-performance level. The design also includes a reference transformer path for comparison purposes.

此参考设计用于为电池和/或系统提供最高 1A 的连续电流。它拥有一个 4.9 VDC、最大 50mA 的内部 LDO，可用于 USB 应用和任何其他用途。它使用高度集成的磷酸铁锂线 ( LiFePO4 ) 性电池充电器 bq25070，使本解决方案适于空间有限的便携式应用。它由 USB 端口或交流适配器供电，并为单节 LiFePO4 电池提供高达 1A 的充电电流。带 10.5V 输入过压保护的 30V 最大额定输入电压，支持低成本、未稳压的适配器。

TIDA-01016 is a clocking solution for high dynamic range high speed ADC. RF input signals are directly captured using the RF sampling approach by high speed ADC. The ADC32RF45 is a dual- channel: 14-bit: 3-GSPS RF sampling ADC. The 3-dB input bandwidth is 3.2 GHz: and it captures signals up to 4 GHz. This design showcases the clocking solution using the LMX2582: to achieve the best SNR performance of ADC32RF45 at higher input frequencies used in microwave backhaul applications.