Parametric results for: 74lvc1g175gw-q100h under FF/Latches

All Filters Family JESD-30 Code JESD-609 Code Length Logic IC Type Manufacturer Moisture Sensitivity Level Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Shape Package Style Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount Trigger Type Family (1)

LVC/LCX/Z 2

2 hits Apply

R-PDSO-G6 2

2 hits Apply

e3 1

2 hits Apply

2 mm 2

2 hits Apply

D FLIP-FLOP 2

2 hits Apply

Manufacturer (2)

Nexperia 1 NXP Semiconductors 1

2 hits Apply

1 1

2 hits Apply

Number of Bits (1)

1 2

2 hits Apply

Number of Functions (1)

1.0 2

2 hits Apply

6 2

2 hits Apply

125.0 °C 2

2 hits Apply

-40.0 °C 2

2 hits Apply

TRUE 2

2 hits Apply

PLASTIC/EPOXY 2

2 hits Apply

Package Code (1)

TSSOP 2

2 hits Apply

RECTANGULAR 2

2 hits Apply

SMALL OUTLINE, THIN PROFILE, SHRINK PITCH 2

2 hits Apply

Propagation Delay (tpd) (1)

17 ns 2

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

3.3 V 2

2 hits Apply

Surface Mount (1)

YES 2

2 hits Apply

Trigger Type (1)

POSITIVE EDGE 2

2 hits Apply