Parametric results for: AT40K05-2AJL under Field Programmable Gate Arrays

All Filters Additional Feature Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Moisture Sensitivity Level Number of CLBs Number of Equivalent Gates Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Shape Package Style Part Life Cycle Code Programmable Logic Type Qualification Status Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Finish Terminal Form

MAXIMUM USABLE GATES 10000 1

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Combinatorial Delay of a CLB-Max (1)

2.2 ns 1

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S-PQCC-J84 1

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e3 1

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29.3116 mm 1

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Manufacturer (1)

Atmel Corporation 1

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2 1

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Number of CLBs (1)

256 1

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Number of Equivalent Gates (1)

5000 1

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84 1

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70.0 °C 1

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0.0 °C 1

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256 CLBS, 5000 GATES 1

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PLASTIC/EPOXY 1

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QCCJ 1

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Package Shape (1)

SQUARE 1

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CHIP CARRIER 1

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Obsolete 1

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Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

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Not Qualified 1

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Yes 1

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4.57 mm 1

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5.25 V 1

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4.75 V 1

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Supply Voltage-Nom (1)

5 V 1

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YES 1

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CMOS 1

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Temperature Grade (1)

COMMERCIAL 1

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MATTE TIN 1

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J BEND 1

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