Parametric results for: CD4572UBMG4 under Gates

All Filters Additional Feature Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max I(ol) Moisture Sensitivity Level Number of Functions Number of Inputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Schmitt Trigger Supply Voltage-Nom (Vsup) Surface Mount

MIXED WITH ONE 2-INPUT NOR & ONE 2-INPUT NAND GATE 1

1 hit Apply

Family (1)

4000/14000/40000 1

1 hit Apply

R-PDSO-G16 1

1 hit Apply

e4 1

1 hit Apply

9.9 mm 1

1 hit Apply

Load Capacitance (CL) (1)

50 pF 1

1 hit Apply

INVERTER 1

1 hit Apply

Manufacturer (1)

Texas Instruments 1

1 hit Apply

6.8 mA 1

1 hit Apply

1 1

1 hit Apply

Number of Functions (1)

4.0 1

1 hit Apply

Number of Inputs (1)

1 1

1 hit Apply

16 1

1 hit Apply

125.0 °C 1

1 hit Apply

-55.0 °C 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

Package Code (1)

SOP 1

1 hit Apply

SOP16,.25 1

1 hit Apply

RECTANGULAR 1

1 hit Apply

SMALL OUTLINE 1

1 hit Apply

Prop. Delay@Nom-Sup (1)

200 ns 1

1 hit Apply

Propagation Delay (tpd) (1)

200 ns 1

1 hit Apply

Schmitt Trigger (1)

NO 1

1 hit Apply

Supply Voltage-Nom (Vsup) (1)

5 V 1

1 hit Apply

Surface Mount (1)

YES 1

1 hit Apply