Parametric results for: CY2SSTV16857ZIT under FF/Latches

All Filters Family JESD-30 Code JESD-609 Code Length Logic IC Type Manufacturer Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount Trigger Type Family (1)

SSTV 2

2 hits Apply

R-PDSO-G48 2

2 hits Apply

e0 2

2 hits Apply

12.4965 mm 2

2 hits Apply

D FLIP-FLOP 2

2 hits Apply

Manufacturer (2)

Cypress Semiconductor 1 Silicon Laboratories Inc 1

2 hits Apply

Number of Bits (1)

14 2

2 hits Apply

Number of Functions (1)

1.0 2

2 hits Apply

48 2

2 hits Apply

85.0 °C 2

2 hits Apply

-40.0 °C 2

2 hits Apply

TRUE 2

2 hits Apply

PLASTIC/EPOXY 2

2 hits Apply

Package Code (1)

TSSOP 2

2 hits Apply

TSSOP48,.3,20 2

2 hits Apply

RECTANGULAR 2

2 hits Apply

SMALL OUTLINE, THIN PROFILE, SHRINK PITCH 2

2 hits Apply

Propagation Delay (tpd) (1)

2.8 ns 2

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

2.5 V 2

2 hits Apply

Surface Mount (1)

YES 2

2 hits Apply

Trigger Type (1)

POSITIVE EDGE 2

2 hits Apply