Parametric results for: DS1005K-150 under Delay Lines

All Filters Additional Feature Family Input Frequency-Max (fmax) JESD-30 Code JESD-609 Code Length Logic IC Type Manufacturer Moisture Sensitivity Level Number of Functions Number of Taps/Steps Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Supply Voltage-Nom (Vsup) Surface Mount Total Delay-Nom (td)

BOTH LEADING & TRAILING EDGE ACCURACY; MAX FAN OUT OF 10 74LS LOAD PER OUTPUT 3

3 hits Apply

Family (1)

CMOS/TTL 3

3 hits Apply

4.1667 MHz 1

3 hits Apply

R-PDIP-T14 2 R-PDIP-T8 1

3 hits Apply

e0 3

3 hits Apply

19.05 mm 2

3 hits Apply

SILICON DELAY LINE 3

3 hits Apply

Manufacturer (3)

Dallas Semiconductor 1 Maxim Integrated Products 1 Rochester Electronics LLC 1

3 hits Apply

NOT SPECIFIED 1

3 hits Apply

Number of Functions (1)

1.0 3

3 hits Apply

5 3

3 hits Apply

14 2 8 1

3 hits Apply

70.0 °C 3

3 hits Apply

0.0 °C 3

3 hits Apply

TRUE 3

3 hits Apply

PLASTIC/EPOXY 3

3 hits Apply

Package Code (1)

DIP 3

3 hits Apply

DIP14,.3 2

3 hits Apply

RECTANGULAR 3

3 hits Apply

IN-LINE 3

3 hits Apply

Prop. Delay@Nom-Sup (1)

150 ns 2

3 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 3

3 hits Apply

Surface Mount (1)

NO 3

3 hits Apply

Total Delay-Nom (td) (1)

150 ns 3

3 hits Apply