Parametric results for: DS1005S-125+T&R under Delay Lines

All Filters Additional Feature Family JESD-30 Code JESD-609 Code Length Logic IC Type Manufacturer Moisture Sensitivity Level Number of Functions Number of Taps/Steps Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Supply Voltage-Nom (Vsup) Surface Mount Total Delay-Nom (td)

BOTH LEADING & TRAILING EDGE ACCURACY; MAX FAN OUT OF 10 74LS LOAD PER OUTPUT 3

3 hits Apply

Family (1)

CMOS/TTL 3

3 hits Apply

R-PDSO-G16 3

3 hits Apply

e0 1 e3 1

3 hits Apply

10.335 mm 1

3 hits Apply

SILICON DELAY LINE 3

3 hits Apply

Manufacturer (2)

Dallas Semiconductor 1 Maxim Integrated Products 2

3 hits Apply

1 1

3 hits Apply

Number of Functions (1)

1.0 3

3 hits Apply

5 3

3 hits Apply

16 3

3 hits Apply

70.0 °C 3

3 hits Apply

0.0 °C 3

3 hits Apply

TRUE 3

3 hits Apply

PLASTIC/EPOXY 3

3 hits Apply

Package Code (1)

SOP 2

3 hits Apply

SOP16,.4 2

3 hits Apply

RECTANGULAR 3

3 hits Apply

SMALL OUTLINE 3

3 hits Apply

Prop. Delay@Nom-Sup (1)

125 ns 2

3 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 3

3 hits Apply

Surface Mount (1)

YES 3

3 hits Apply

Total Delay-Nom (td) (1)

125 ns 3

3 hits Apply