Parametric results for: EFXLDM-TTL-60G under Delay Lines

All Filters Additional Feature Family JESD-30 Code Length Logic IC Type Manufacturer Number of Functions Number of Taps/Steps Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Shape Package Style Supply Voltage-Nom (Vsup) Surface Mount Total Delay-Nom (td)

TAP TO TAP DELAY TOL.[NS] VARIES; INTERNAL TERMINATION; MAX RISE TIME CAPTURED 1

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Family (1)

F 1

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R-XDSO-G13 1

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20.32 mm 1

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ACTIVE DELAY LINE 1

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Manufacturer (1)

Engineered Components Co 1

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Number of Functions (1)

1.0 1

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10 1

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13 1

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70.0 °C 1

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0.0 °C 1

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TRUE 1

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UNSPECIFIED 1

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Package Code (1)

SOP 1

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RECTANGULAR 1

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SMALL OUTLINE 1

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Supply Voltage-Nom (Vsup) (1)

5 V 1

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Surface Mount (1)

YES 1

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Total Delay-Nom (td) (1)

60 ns 1

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