Parametric results for: EP910TPC-30 under Programmable Logic Devices

All Filters Architecture Clock Frequency-Max JESD-30 Code JESD-609 Code Manufacturer Number of Inputs Number of Outputs Number of Product Terms Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Function Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Peak Reflow Temperature (Cel) Propagation Delay Qualification Status Rohs Code Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Finish Terminal Form

PAL-TYPE 1

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33.3 MHz 1

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R-PDIP-T40 1

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e0 1

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Manufacturer (1)

Altera Corporation 1

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Number of Inputs (1)

36 1

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Number of Outputs (1)

24 1

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240 1

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40 1

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70.0 °C 1

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0.0 °C 1

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MACROCELL 1

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PLASTIC/EPOXY 1

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DIP 1

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DIP40,.6 1

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Package Shape (1)

RECTANGULAR 1

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IN-LINE 1

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Obsolete 1

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220 1

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Propagation Delay (1)

33 ns 1

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Not Qualified 1

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No 1

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Supply Voltage-Nom (1)

5 V 1

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NO 1

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CMOS 1

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Temperature Grade (1)

COMMERCIAL 1

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TIN LEAD 1

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THROUGH-HOLE 1

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