Parametric results for: SN74LV174ADRE4 under FF/Latches

All Filters Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max Frequency@Nom-Sup Max I(ol) Moisture Sensitivity Level Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount Trigger Type Family (1)

LV/LV-A/LVX/H 1

1 hit Apply

R-PDSO-G16 1

1 hit Apply

e4 1

1 hit Apply

9.9 mm 1

1 hit Apply

Load Capacitance (CL) (1)

50 pF 1

1 hit Apply

D FLIP-FLOP 1

1 hit Apply

Manufacturer (1)

Texas Instruments 1

1 hit Apply

Max Frequency@Nom-Sup (1)

50 MHz 1

1 hit Apply

6 mA 1

1 hit Apply

1 1

1 hit Apply

Number of Bits (1)

6 1

1 hit Apply

Number of Functions (1)

1.0 1

1 hit Apply

16 1

1 hit Apply

85.0 °C 1

1 hit Apply

-40.0 °C 1

1 hit Apply

TRUE 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

Package Code (1)

SOP 1

1 hit Apply

SOP16,.25 1

1 hit Apply

RECTANGULAR 1

1 hit Apply

SMALL OUTLINE 1

1 hit Apply

Prop. Delay@Nom-Sup (1)

16.5 ns 1

1 hit Apply

Propagation Delay (tpd) (1)

23 ns 1

1 hit Apply

Supply Voltage-Nom (Vsup) (1)

2.5 V 1

1 hit Apply

Surface Mount (1)

YES 1

1 hit Apply

Trigger Type (1)

POSITIVE EDGE 1

1 hit Apply