Parametric results for: SN74LVC1G08DCKR under Gates

All Filters Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max I(ol) Moisture Sensitivity Level Number of Functions Number of Inputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Schmitt Trigger Supply Voltage-Nom (Vsup) Surface Mount Family (1)

LVC/LCX/Z 4

4 hits Apply

R-PDSO-G5 4

4 hits Apply

e4 3

4 hits Apply

2 mm 4

4 hits Apply

Load Capacitance (CL) (1)

50 pF 3

4 hits Apply

AND GATE 4

4 hits Apply

Manufacturer (2)

Rochester Electronics LLC 1 Texas Instruments 3

4 hits Apply

32 mA 3

4 hits Apply

1 3

4 hits Apply

Number of Functions (1)

1.0 4

4 hits Apply

Number of Inputs (1)

2 4

4 hits Apply

5 4

4 hits Apply

125.0 °C 4

4 hits Apply

-40.0 °C 4

4 hits Apply

PLASTIC/EPOXY 4

4 hits Apply

Package Code (1)

TSSOP 4

4 hits Apply

TSSOP5/6,.08 3

4 hits Apply

RECTANGULAR 4

4 hits Apply

SMALL OUTLINE, THIN PROFILE, SHRINK PITCH 4

4 hits Apply

Prop. Delay@Nom-Sup (1)

4.5 ns 3

4 hits Apply

Propagation Delay (tpd) (2)

8 ns 3 10 ns 1

Min (ns) - Max (ns)

4 hits Apply

Schmitt Trigger (1)

NO 3

4 hits Apply

Supply Voltage-Nom (Vsup) (2)

1.8 V 1 3.3 V 3

Min (V) - Max (V)

4 hits Apply

Surface Mount (1)

YES 4

4 hits Apply