Parametric results for: SN74LVC2G00DCUT under Gates

All Filters Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max I(ol) Moisture Sensitivity Level Number of Functions Number of Inputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Characteristics Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Schmitt Trigger Supply Voltage-Nom (Vsup) Surface Mount Family (1)

LVC/LCX/Z 4

4 hits Apply

R-PDSO-G8 4

4 hits Apply

e3 1 e4 3

4 hits Apply

2.3 mm 4

4 hits Apply

Load Capacitance (CL) (1)

50 pF 3

4 hits Apply

NAND GATE 4

4 hits Apply

Manufacturer (2)

Rochester Electronics LLC 1 Texas Instruments 3

4 hits Apply

24 mA 1 32 mA 2

Min (A) - Max (A)

4 hits Apply

1 4

4 hits Apply

Number of Functions (1)

2.0 4

4 hits Apply

Number of Inputs (1)

2 4

4 hits Apply

8 4

4 hits Apply

85.0 °C 2 125.0 °C 2

Min (°C) - Max (°C)

4 hits Apply

-40.0 °C 4

4 hits Apply

Output Characteristics (1)

3-STATE 4

4 hits Apply

PLASTIC/EPOXY 4

4 hits Apply

Package Code (1)

VSSOP 4

4 hits Apply

TSSOP8,.12,20 3

4 hits Apply

RECTANGULAR 4

4 hits Apply

SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH 4

4 hits Apply

Prop. Delay@Nom-Sup (1)

4.3 ns 3

4 hits Apply

Propagation Delay (tpd) (1)

8.6 ns 4

4 hits Apply

Schmitt Trigger (1)

NO 3

4 hits Apply

Supply Voltage-Nom (Vsup) (1)

1.8 V 4

4 hits Apply

Surface Mount (1)

YES 4

4 hits Apply