Parametric results for: XC4010E-4PCG84I under Field Programmable Gate Arrays

All Filters Additional Feature Clock Frequency-Max Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Moisture Sensitivity Level Number of CLBs Number of Equivalent Gates Number of Inputs Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Shape Package Style Part Life Cycle Code Pbfree Code Peak Reflow Temperature (Cel) Programmable Logic Type Qualification Status Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Terminal Finish Terminal Form

MAX USABLE 10000 LOGIC GATES 1

1 hit Apply

111 MHz 1

1 hit Apply

Combinatorial Delay of a CLB-Max (1)

2.7 ns 1

1 hit Apply

S-PQCC-J84 1

1 hit Apply

e3 1

1 hit Apply

29.3116 mm 1

1 hit Apply

Manufacturer (1)

AMD Xilinx 1

1 hit Apply

3 1

1 hit Apply

Number of CLBs (1)

400 1

1 hit Apply

Number of Equivalent Gates (1)

7000 1

1 hit Apply

Number of Inputs (1)

61 1

1 hit Apply

Number of Outputs (1)

61 1

1 hit Apply

84 1

1 hit Apply

100.0 °C 1

1 hit Apply

-40.0 °C 1

1 hit Apply

400 CLBS, 7000 GATES 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

QCCJ 1

1 hit Apply

Package Shape (1)

SQUARE 1

1 hit Apply

CHIP CARRIER 1

1 hit Apply

Obsolete 1

1 hit Apply

Yes 1

1 hit Apply

245 1

1 hit Apply

Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

1 hit Apply

Not Qualified 1

1 hit Apply

Yes 1

1 hit Apply

5.08 mm 1

1 hit Apply

5.5 V 1

1 hit Apply

4.5 V 1

1 hit Apply

Supply Voltage-Nom (1)

5 V 1

1 hit Apply

YES 1

1 hit Apply

CMOS 1

1 hit Apply

MATTE TIN 1

1 hit Apply

J BEND 1

1 hit Apply