Parametric results for: XC4062XLA-08HQ208I under Field Programmable Gate Arrays

All Filters Additional Feature Clock Frequency-Max Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Moisture Sensitivity Level Number of CLBs Number of Equivalent Gates Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Organization Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Peak Reflow Temperature (Cel) Programmable Logic Type Qualification Status Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Terminal Finish Terminal Form

CAN ALSO USE 130000 GATES 1

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263 MHz 1

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Combinatorial Delay of a CLB-Max (1)

1 ns 1

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S-PQFP-G208 1

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e0 1

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28 mm 1

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Manufacturer (1)

AMD Xilinx 1

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3 1

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Number of CLBs (1)

2304 1

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Number of Equivalent Gates (1)

40000 1

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Number of Inputs (1)

160 1

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Number of Logic Cells (1)

5472 1

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Number of Outputs (1)

160 1

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208 1

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2304 CLBS, 40000 GATES 1

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PLASTIC/EPOXY 1

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HFQFP 1

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HQFP208,1.2SQ,20 1

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Package Shape (1)

SQUARE 1

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FLATPACK, HEAT SINK/SLUG, FINE PITCH 1

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Obsolete 1

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225 1

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Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

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Not Qualified 1

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No 1

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4.1 mm 1

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3.6 V 1

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3 V 1

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Supply Voltage-Nom (1)

3.3 V 1

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YES 1

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CMOS 1

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Tin/Lead (Sn85Pb15) 1

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GULL WING 1

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