Parametric results for: XCV1000-6BGG560C under Field Programmable Gate Arrays

All Filters Clock Frequency-Max Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Moisture Sensitivity Level Number of CLBs Number of Equivalent Gates Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Shape Package Style Part Life Cycle Code Pbfree Code Peak Reflow Temperature (Cel) Programmable Logic Type Qualification Status Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Finish Terminal Form

333 MHz 1

1 hit Apply

Combinatorial Delay of a CLB-Max (1)

600 ps 1

1 hit Apply

S-PBGA-B560 1

1 hit Apply

e1 1

1 hit Apply

42.5 mm 1

1 hit Apply

Manufacturer (1)

AMD Xilinx 1

1 hit Apply

3 1

1 hit Apply

Number of CLBs (1)

6144 1

1 hit Apply

Number of Equivalent Gates (1)

1124022 1

1 hit Apply

560 1

1 hit Apply

85.0 °C 1

1 hit Apply

0.0 °C 1

1 hit Apply

6144 CLBS, 1124022 GATES 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

LBGA 1

1 hit Apply

Package Shape (1)

SQUARE 1

1 hit Apply

GRID ARRAY, LOW PROFILE 1

1 hit Apply

Obsolete 1

1 hit Apply

Yes 1

1 hit Apply

260 1

1 hit Apply

Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

1 hit Apply

Not Qualified 1

1 hit Apply

Yes 1

1 hit Apply

1.7 mm 1

1 hit Apply

2.625 V 1

1 hit Apply

2.375 V 1

1 hit Apply

Supply Voltage-Nom (1)

2.5 V 1

1 hit Apply

YES 1

1 hit Apply

CMOS 1

1 hit Apply

Temperature Grade (1)

OTHER 1

1 hit Apply

Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) 1

1 hit Apply

BALL 1

1 hit Apply