Parametric results for: XQV1000-4BGG560N under Field Programmable Gate Arrays

All Filters Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Moisture Sensitivity Level Number of CLBs Number of Equivalent Gates Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Shape Package Style Part Life Cycle Code Pbfree Code Peak Reflow Temperature (Cel) Programmable Logic Type Qualification Status Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Finish Terminal Form Combinatorial Delay of a CLB-Max (1)

800 ps 1

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S-PBGA-B560 1

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e1 1

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42.5 mm 1

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Manufacturer (1)

AMD Xilinx 1

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3 1

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Number of CLBs (1)

6144 1

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Number of Equivalent Gates (1)

1124022 1

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560 1

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125.0 °C 1

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-55.0 °C 1

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6144 CLBS, 1124022 GATES 1

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PLASTIC/EPOXY 1

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LBGA 1

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Package Shape (1)

SQUARE 1

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GRID ARRAY, LOW PROFILE 1

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Obsolete 1

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Yes 1

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260 1

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Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

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Not Qualified 1

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Yes 1

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1.7 mm 1

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2.625 V 1

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2.375 V 1

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Supply Voltage-Nom (1)

2.5 V 1

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YES 1

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CMOS 1

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Temperature Grade (1)

MILITARY 1

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Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) 1

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BALL 1

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