Parametric results for: cy7c372i-100jc under Programmable Logic Devices

All Filters Additional Feature Clock Frequency-Max In-System Programmable JESD-30 Code JESD-609 Code JTAG BST Length Manufacturer Number of Dedicated Inputs Number of I/O Lines Number of Macro Cells Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Output Function Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Programmable Logic Type Propagation Delay Qualification Status Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Finish Terminal Form

LABS INTERCONNECTED BY PIA; 4 LABS; 64 MACROCELLS; 2 EXTERNAL CLOCKS; SHARED INPUT/CLOCK 3

3 hits Apply

80 MHz 3

3 hits Apply

YES 1

3 hits Apply

S-PQCC-J44 3

3 hits Apply

e0 1

3 hits Apply

NO 1

3 hits Apply

16.6116 mm 3

3 hits Apply

Manufacturer (1)

Cypress Semiconductor 3

3 hits Apply

Number of Dedicated Inputs (2)

3 2 4 1

Min - Max

3 hits Apply

Number of I/O Lines (1)

32 3

3 hits Apply

Number of Macro Cells (1)

64 1

3 hits Apply

44 3

3 hits Apply

70.0 °C 3

3 hits Apply

0.0 °C 3

3 hits Apply

3 DEDICATED INPUTS, 32 I/O 2 4 DEDICATED INPUTS, 32 I/O 1

3 hits Apply

MACROCELL 3

3 hits Apply

PLASTIC/EPOXY 3

3 hits Apply

QCCJ 3

3 hits Apply

LDCC44,.7SQ 3

3 hits Apply

Package Shape (1)

SQUARE 3

3 hits Apply

CHIP CARRIER 3

3 hits Apply

Obsolete 3

3 hits Apply

Programmable Logic Type (1)

FLASH PLD 3

3 hits Apply

Propagation Delay (2)

12 ns 2 16 ns 1

Min (ns) - Max (ns)

3 hits Apply

Not Qualified 3

3 hits Apply

No 1

3 hits Apply

4.57 mm 1 4.572 mm 2

Min (mm) - Max (mm)

3 hits Apply

5.25 V 3

3 hits Apply

4.75 V 3

3 hits Apply

Supply Voltage-Nom (1)

5 V 3

3 hits Apply

YES 3

3 hits Apply

CMOS 3

3 hits Apply

Temperature Grade (1)

COMMERCIAL 3

3 hits Apply

TIN LEAD 1

3 hits Apply

J BEND 3

3 hits Apply