Parametric results for: sn54hc112j under FF/Latches

All Filters Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max Frequency@Nom-Sup Max I(ol) Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Schmitt Trigger Supply Voltage-Nom (Vsup) Surface Mount Trigger Type Family (1)

HC/UH 2

2 hits Apply

R-GDIP-T16 2

2 hits Apply

e0 1

2 hits Apply

19.56 mm 2

2 hits Apply

Load Capacitance (CL) (1)

50 pF 2

2 hits Apply

J-K FLIP-FLOP 2

2 hits Apply

Manufacturer (1)

Texas Instruments 2

2 hits Apply

Max Frequency@Nom-Sup (1)

20 MHz 1

2 hits Apply

-4 mA 1

2 hits Apply

Number of Bits (1)

2 2

2 hits Apply

Number of Functions (1)

2.0 2

2 hits Apply

16 2

2 hits Apply

125.0 °C 2

2 hits Apply

-55.0 °C 2

2 hits Apply

COMPLEMENTARY 2

2 hits Apply

CERAMIC, GLASS-SEALED 2

2 hits Apply

Package Code (1)

DIP 2

2 hits Apply

DIP16,.3 1

2 hits Apply

RECTANGULAR 2

2 hits Apply

IN-LINE 2

2 hits Apply

Prop. Delay@Nom-Sup (1)

41 ns 1

2 hits Apply

Propagation Delay (tpd) (2)

37 ns 1 185 ns 1

Min (ns) - Max (ns)

2 hits Apply

Schmitt Trigger (1)

NO 1

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 2

2 hits Apply

Surface Mount (1)

NO 2

2 hits Apply

Trigger Type (1)

NEGATIVE EDGE 2

2 hits Apply