Parametric results for: sn74lvc74apwr under FF/Latches

All Filters Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max Frequency@Nom-Sup Max I(ol) Moisture Sensitivity Level Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount Trigger Type Family (1)

LVC/LCX/Z 4

4 hits Apply

R-PDSO-G14 4

4 hits Apply

e4 3

4 hits Apply

5 mm 4

4 hits Apply

Load Capacitance (CL) (1)

50 pF 4

4 hits Apply

D FLIP-FLOP 4

4 hits Apply

Manufacturer (1)

Texas Instruments 4

4 hits Apply

Max Frequency@Nom-Sup (1)

150 MHz 4

4 hits Apply

24 mA 4

4 hits Apply

1 3

4 hits Apply

Number of Bits (1)

1 4

4 hits Apply

Number of Functions (1)

2.0 4

4 hits Apply

14 4

4 hits Apply

85.0 °C 1 125.0 °C 3

Min (°C) - Max (°C)

4 hits Apply

-40.0 °C 4

4 hits Apply

COMPLEMENTARY 4

4 hits Apply

PLASTIC/EPOXY 4

4 hits Apply

Package Code (1)

TSSOP 4

4 hits Apply

TSSOP14,.25 4

4 hits Apply

RECTANGULAR 4

4 hits Apply

SMALL OUTLINE, THIN PROFILE, SHRINK PITCH 4

4 hits Apply

Prop. Delay@Nom-Sup (1)

5.2 ns 4

4 hits Apply

Propagation Delay (tpd) (1)

7.1 ns 4

4 hits Apply

Supply Voltage-Nom (Vsup) (2)

1.8 V 3 3.3 V 1

Min (V) - Max (V)

4 hits Apply

Surface Mount (1)

YES 4

4 hits Apply

Trigger Type (1)

POSITIVE EDGE 4

4 hits Apply