Parametric results for: sn74s113an under FF/Latches

All Filters Family JESD-30 Code JESD-609 Code Length Logic IC Type Manufacturer Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount Trigger Type Family (1)

S 2

4 hits Apply

R-PDIP-T14 3

4 hits Apply

e0 1

4 hits Apply

19.305 mm 2

4 hits Apply

J-K FLIP-FLOP 4

4 hits Apply

Manufacturer (2)

Rochester Electronics LLC 2 Texas Instruments 2

4 hits Apply

Number of Bits (1)

2 2

4 hits Apply

Number of Functions (1)

2.0 3

4 hits Apply

14 3

4 hits Apply

70.0 °C 3

4 hits Apply

0.0 °C 3

4 hits Apply

COMPLEMENTARY 2

4 hits Apply

PLASTIC/EPOXY 3

4 hits Apply

Package Code (1)

DIP 3

4 hits Apply

DIP14,.3 2

4 hits Apply

RECTANGULAR 3

4 hits Apply

IN-LINE 3

4 hits Apply

Propagation Delay (tpd) (1)

7 ns 2

4 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 3

4 hits Apply

Surface Mount (1)

NO 3

4 hits Apply

Trigger Type (1)

NEGATIVE EDGE 3

4 hits Apply