Part Details for PIC18F2331-I/SPREL by Microchip Technology Inc
Overview of PIC18F2331-I/SPREL by Microchip Technology Inc
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Part Details for PIC18F2331-I/SPREL
PIC18F2331-I/SPREL CAD Models
PIC18F2331-I/SPREL Part Data Attributes
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PIC18F2331-I/SPREL
Microchip Technology Inc
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PIC18F2331-I/SPREL
Microchip Technology Inc
MCU CMOS 28LD 40MHZ 8K BYTE FLASH, -40C to +85C, 28-SPDIP, TUBE
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Pbfree Code | Yes | |
Part Life Cycle Code | Active | |
Ihs Manufacturer | MICROCHIP TECHNOLOGY INC | |
Part Package Code | DIP | |
Package Description | SDIP-28 | |
Pin Count | 28 | |
Reach Compliance Code | compliant | |
ECCN Code | EAR99 | |
HTS Code | 8542.31.00.01 | |
Has ADC | YES | |
Address Bus Width | ||
Bit Size | 8 | |
Boundary Scan | NO | |
CPU Family | PIC18 | |
Clock Frequency-Max | 40 MHz | |
DAC Channels | NO | |
DMA Channels | NO | |
External Data Bus Width | ||
Format | FIXED POINT | |
Integrated Cache | NO | |
JESD-30 Code | R-PDIP-T28 | |
JESD-609 Code | e3 | |
Length | 34.671 mm | |
Low Power Mode | YES | |
Number of External Interrupts | 3 | |
Number of I/O Lines | 24 | |
Number of Serial I/Os | 1 | |
Number of Terminals | 28 | |
Number of Timers | 6 | |
On Chip Data RAM Width | 8 | |
On Chip Program ROM Width | 8 | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | -40 °C | |
PWM Channels | YES | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | DIP | |
Package Equivalence Code | DIP28,.3 | |
Package Shape | RECTANGULAR | |
Package Style | IN-LINE | |
RAM (bytes) | 768 | |
ROM (words) | 8192 | |
ROM Programmability | FLASH | |
Screening Level | TS 16949 | |
Seated Height-Max | 5.08 mm | |
Speed | 40 MHz | |
Supply Current-Max | 15 mA | |
Supply Voltage-Max | 5.5 V | |
Supply Voltage-Min | 4.2 V | |
Supply Voltage-Nom | 5 V | |
Surface Mount | NO | |
Technology | CMOS | |
Temperature Grade | INDUSTRIAL | |
Terminal Finish | MATTE TIN | |
Terminal Form | THROUGH-HOLE | |
Terminal Pitch | 2.54 mm | |
Terminal Position | DUAL | |
Width | 7.62 mm | |
uPs/uCs/Peripheral ICs Type | MICROCONTROLLER, RISC |