Parametric results for: 7200L12TPG under FIFOs

All Filters Access Time-Max Additional Feature Clock Frequency-Max (fCLK) Cycle Time JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Number of Functions Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Enable Package Body Material Package Code Package Equivalence Code Package Shape Package Style Supply Voltage-Nom (Vsup) Access Time-Max (1)

12 ns 3

3 hits Apply

RETRANSMIT 3

3 hits Apply

Clock Frequency-Max (fCLK) (1)

50 MHz 3

3 hits Apply

Cycle Time (1)

20 ns 3

3 hits Apply

R-PDIP-T28 3

3 hits Apply

e3 3

3 hits Apply

34.671 mm 3

3 hits Apply

Manufacturer (2)

Integrated Device Technology Inc 2 Renesas Electronics Corporation 1

3 hits Apply

Memory Density (1)

2.304 kbit 3

3 hits Apply

OTHER FIFO 3

3 hits Apply

Memory Width (1)

9 3

3 hits Apply

1.0 3

3 hits Apply

28 3

3 hits Apply

256 words 3

3 hits Apply

256.0 3

3 hits Apply

ASYNCHRONOUS 3

3 hits Apply

70.0 °C 3

3 hits Apply

0.0 °C 3

3 hits Apply

Organization (1)

256X9 3

3 hits Apply

NO 3

3 hits Apply

PLASTIC/EPOXY 3

3 hits Apply

DIP 3

3 hits Apply

DIP28,.3 3

3 hits Apply

RECTANGULAR 3

3 hits Apply

IN-LINE 3

3 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 3

3 hits Apply