Parametric results for: CD74HC132M96 under Gates

All Filters Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max I(ol) Moisture Sensitivity Level Number of Functions Number of Inputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Schmitt Trigger Supply Voltage-Nom (Vsup) Surface Mount Family (1)

HC/UH 5

6 hits Apply

R-PDSO-G14 6

6 hits Apply

e0 2 e4 3

6 hits Apply

8.65 mm 3

6 hits Apply

Load Capacitance (CL) (1)

50 pF 5

6 hits Apply

NAND GATE 6

6 hits Apply

Manufacturer (4)

Harris Semiconductor 1 Intersil Corporation 1 Rochester Electronics LLC 1 Texas Instruments 3

6 hits Apply

4 mA 4 5.2 mA 1

Min (A) - Max (A)

6 hits Apply

1 3

6 hits Apply

Number of Functions (1)

4.0 5

6 hits Apply

Number of Inputs (1)

2 5

6 hits Apply

14 6

6 hits Apply

125.0 °C 6

6 hits Apply

-55.0 °C 6

6 hits Apply

PLASTIC/EPOXY 6

6 hits Apply

Package Code (1)

SOP 5

6 hits Apply

SOP14,.25 5

6 hits Apply

RECTANGULAR 6

6 hits Apply

SMALL OUTLINE 6

6 hits Apply

Prop. Delay@Nom-Sup (1)

38 ns 5

6 hits Apply

Propagation Delay (tpd) (2)

38 ns 2 188 ns 3

Min (ns) - Max (ns)

6 hits Apply

Schmitt Trigger (1)

YES 5

6 hits Apply

Supply Voltage-Nom (Vsup) (2)

4.5 V 3 5 V 3

Min (V) - Max (V)

6 hits Apply

Surface Mount (1)

YES 6

6 hits Apply