Parametric results for: CY7C1347G-200BZC under SRAMs

All Filters Access Time-Max Additional Feature Clock Frequency-Max (fCLK) I/O Type JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Moisture Sensitivity Level Number of Functions Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Package Body Material Package Code Package Equivalence Code Package Shape Package Style Supply Voltage-Nom (Vsup) Access Time-Max (1)

2.8 ns 1

1 hit Apply

PIPELINED ARCHITECTURE 1

1 hit Apply

Clock Frequency-Max (fCLK) (1)

200 MHz 1

1 hit Apply

COMMON 1

1 hit Apply

R-PBGA-B165 1

1 hit Apply

e0 1

1 hit Apply

15 mm 1

1 hit Apply

Manufacturer (1)

Cypress Semiconductor 1

1 hit Apply

Memory Density (1)

4.7186 Mbit 1

1 hit Apply

CACHE SRAM 1

1 hit Apply

Memory Width (1)

36 1

1 hit Apply

3 1

1 hit Apply

1.0 1

1 hit Apply

165 1

1 hit Apply

131.072 k 1

1 hit Apply

128000.0 1

1 hit Apply

SYNCHRONOUS 1

1 hit Apply

70.0 °C 1

1 hit Apply

0.0 °C 1

1 hit Apply

Organization (1)

128KX36 1

1 hit Apply

3-STATE 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

LBGA 1

1 hit Apply

BGA165,11X15,40 1

1 hit Apply

RECTANGULAR 1

1 hit Apply

GRID ARRAY, LOW PROFILE 1

1 hit Apply

Supply Voltage-Nom (Vsup) (1)

3.3 V 1

1 hit Apply