Parametric results for: CY7C1381C-100BGC under SRAMs

All Filters Access Time-Max Additional Feature Clock Frequency-Max (fCLK) I/O Type JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Moisture Sensitivity Level Number of Functions Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Package Body Material Package Code Package Equivalence Code Package Shape Package Style Supply Voltage-Nom (Vsup) Access Time-Max (1)

8.5 ns 2

2 hits Apply

FLOW-THROUGH ARCHITECTURE 2

2 hits Apply

Clock Frequency-Max (fCLK) (1)

100 MHz 1

2 hits Apply

COMMON 1

2 hits Apply

R-PBGA-B119 2

2 hits Apply

e0 2

2 hits Apply

22 mm 2

2 hits Apply

Manufacturer (2)

Cypress Semiconductor 1 Rochester Electronics LLC 1

2 hits Apply

Memory Density (1)

18.8744 Mbit 2

2 hits Apply

STANDARD SRAM 2

2 hits Apply

Memory Width (1)

36 2

2 hits Apply

3 1 NOT SPECIFIED 1

2 hits Apply

1.0 2

2 hits Apply

119 2

2 hits Apply

524.288 k 2

2 hits Apply

512000.0 2

2 hits Apply

SYNCHRONOUS 2

2 hits Apply

70.0 °C 2

2 hits Apply

0.0 °C 2

2 hits Apply

Organization (1)

512KX36 2

2 hits Apply

3-STATE 1

2 hits Apply

PLASTIC/EPOXY 2

2 hits Apply

BGA 2

2 hits Apply

BGA119,7X17,50 1

2 hits Apply

RECTANGULAR 2

2 hits Apply

GRID ARRAY 2

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

3.3 V 2

2 hits Apply