Parametric results for: CYD18S18V18-167BBAC under SRAMs

All Filters Access Time-Max Additional Feature Clock Frequency-Max (fCLK) I/O Type JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Moisture Sensitivity Level Number of Functions Number of Ports Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Package Body Material Package Code Package Equivalence Code Package Shape Package Style Supply Voltage-Nom (Vsup) Access Time-Max (1)

4 ns 1

1 hit Apply

PIPELINED OR FLOW-THROUGH ARCHITECTURE, IT CAN ALSO OPERATES AT 1.8V 1

1 hit Apply

Clock Frequency-Max (fCLK) (1)

167 MHz 1

1 hit Apply

COMMON 1

1 hit Apply

S-PBGA-B256 1

1 hit Apply

e0 1

1 hit Apply

17 mm 1

1 hit Apply

Manufacturer (1)

Cypress Semiconductor 1

1 hit Apply

Memory Density (1)

18.8744 Mbit 1

1 hit Apply

MULTI-PORT SRAM 1

1 hit Apply

Memory Width (1)

18 1

1 hit Apply

3 1

1 hit Apply

1.0 1

1 hit Apply

2 1

1 hit Apply

256 1

1 hit Apply

1.0486 M 1

1 hit Apply

1000000.0 1

1 hit Apply

SYNCHRONOUS 1

1 hit Apply

70.0 °C 1

1 hit Apply

0.0 °C 1

1 hit Apply

Organization (1)

1MX18 1

1 hit Apply

3-STATE 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

LBGA 1

1 hit Apply

BGA256,16X16,40 1

1 hit Apply

SQUARE 1

1 hit Apply

GRID ARRAY, LOW PROFILE 1

1 hit Apply

Supply Voltage-Nom (Vsup) (1)

1.5 V 1

1 hit Apply