Parametric results for: CYD18S72V-100BBI under SRAMs

All Filters Access Time-Max Additional Feature Clock Frequency-Max (fCLK) I/O Type JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Moisture Sensitivity Level Number of Functions Number of Ports Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Package Body Material Package Code Package Equivalence Code Package Shape Package Style Supply Voltage-Nom (Vsup) Access Time-Max (1)

5.2 ns 1

1 hit Apply

PIPELINED ARCHITECTURE OR FLOW-THROUGH 1

1 hit Apply

Clock Frequency-Max (fCLK) (1)

100 MHz 1

1 hit Apply

COMMON 1

1 hit Apply

S-PBGA-B484 1

1 hit Apply

e0 1

1 hit Apply

23 mm 1

1 hit Apply

Manufacturer (1)

Cypress Semiconductor 1

1 hit Apply

Memory Density (1)

18.8744 Mbit 1

1 hit Apply

MULTI-PORT SRAM 1

1 hit Apply

Memory Width (1)

72 1

1 hit Apply

3 1

1 hit Apply

1.0 1

1 hit Apply

2 1

1 hit Apply

484 1

1 hit Apply

262.144 k 1

1 hit Apply

256000.0 1

1 hit Apply

SYNCHRONOUS 1

1 hit Apply

85.0 °C 1

1 hit Apply

-40.0 °C 1

1 hit Apply

Organization (1)

256KX72 1

1 hit Apply

3-STATE 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

BGA 1

1 hit Apply

BGA484,22X22,40 1

1 hit Apply

SQUARE 1

1 hit Apply

GRID ARRAY 1

1 hit Apply

Supply Voltage-Nom (Vsup) (1)

3.3 V 1

1 hit Apply