Parametric results for: HYB18T1G160CFL-2.5 under DRAMs

All Filters Access Mode Access Time-Max Additional Feature Clock Frequency-Max (fCLK) I/O Type Interleaved Burst Length JESD-30 Code Length Manufacturer Memory Density Memory IC Type Memory Width Number of Functions Number of Ports Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Package Body Material Package Code Package Equivalence Code Package Shape Package Style Refresh Cycles Supply Voltage-Nom (Vsup) Access Mode (1)

MULTI BANK PAGE BURST 1

1 hit Apply

Access Time-Max (1)

400 ps 1

1 hit Apply

AUTO/SELF REFRESH 1

1 hit Apply

Clock Frequency-Max (fCLK) (1)

400 MHz 1

1 hit Apply

COMMON 1

1 hit Apply

4,8 1

1 hit Apply

R-PBGA-B84 1

1 hit Apply

13.5 mm 1

1 hit Apply

Manufacturer (1)

Qimonda AG 1

1 hit Apply

Memory Density (1)

1.0737 Gbit 1

1 hit Apply

DDR2 DRAM 1

1 hit Apply

Memory Width (1)

16 1

1 hit Apply

1.0 1

1 hit Apply

1 1

1 hit Apply

84 1

1 hit Apply

67.1089 M 1

1 hit Apply

6.4E7 1

1 hit Apply

SYNCHRONOUS 1

1 hit Apply

85.0 °C 1

1 hit Apply

0.0 °C 1

1 hit Apply

Organization (1)

64MX16 1

1 hit Apply

3-STATE 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

TFBGA 1

1 hit Apply

BGA84,9X15,32 1

1 hit Apply

RECTANGULAR 1

1 hit Apply

GRID ARRAY, THIN PROFILE, FINE PITCH 1

1 hit Apply

Refresh Cycles (1)

8192 1

1 hit Apply

Supply Voltage-Nom (Vsup) (1)

1.8 V 1

1 hit Apply