Parametric results for: HYB18T256800AF-5 under DRAMs

All Filters Access Mode Access Time-Max Additional Feature Clock Frequency-Max (fCLK) I/O Type Interleaved Burst Length JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Moisture Sensitivity Level Number of Functions Number of Ports Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Package Body Material Package Code Package Equivalence Code Package Shape Package Style Refresh Cycles Supply Voltage-Nom (Vsup) Access Mode (1)

FOUR BANK PAGE BURST 2

2 hits Apply

Access Time-Max (1)

600 ps 2

2 hits Apply

AUTO/SELF REFRESH 2

2 hits Apply

Clock Frequency-Max (fCLK) (1)

200 MHz 2

2 hits Apply

COMMON 2

2 hits Apply

4,8 2

2 hits Apply

R-PBGA-B60 2

2 hits Apply

e1 2

2 hits Apply

10.5 mm 2

2 hits Apply

Manufacturer (2)

Infineon Technologies AG 1 Qimonda AG 1

2 hits Apply

Memory Density (1)

268.4355 Mbit 2

2 hits Apply

DDR2 DRAM 2

2 hits Apply

Memory Width (1)

8 2

2 hits Apply

3 1

2 hits Apply

1.0 2

2 hits Apply

1 2

2 hits Apply

60 2

2 hits Apply

33.5544 M 2

2 hits Apply

3.2E7 2

2 hits Apply

SYNCHRONOUS 2

2 hits Apply

85.0 °C 2

2 hits Apply

0.0 °C 2

2 hits Apply

Organization (1)

32MX8 2

2 hits Apply

3-STATE 2

2 hits Apply

PLASTIC/EPOXY 2

2 hits Apply

TFBGA 2

2 hits Apply

BGA60,9X11,32 2

2 hits Apply

RECTANGULAR 2

2 hits Apply

GRID ARRAY, THIN PROFILE, FINE PITCH 2

2 hits Apply

Refresh Cycles (1)

8192 2

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

1.8 V 2

2 hits Apply