Parametric results for: HYS64T128020EU25B2 under DRAMs

All Filters Access Mode Access Time-Max Additional Feature Clock Frequency-Max (fCLK) I/O Type JESD-30 Code Manufacturer Memory Density Memory IC Type Memory Width Number of Functions Number of Ports Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Package Body Material Package Code Package Equivalence Code Package Shape Package Style Refresh Cycles Supply Voltage-Nom (Vsup) Access Mode (1)

DUAL BANK PAGE BURST 1

1 hit Apply

Access Time-Max (1)

400 ps 1

1 hit Apply

AUTO/SELF REFRESH 1

1 hit Apply

Clock Frequency-Max (fCLK) (1)

400 MHz 1

1 hit Apply

COMMON 1

1 hit Apply

R-XDMA-N240 1

1 hit Apply

Manufacturer (1)

Qimonda AG 1

1 hit Apply

Memory Density (1)

8.5899 Gbit 1

1 hit Apply

DDR DRAM MODULE 1

1 hit Apply

Memory Width (1)

64 1

1 hit Apply

1.0 1

1 hit Apply

1 1

1 hit Apply

240 1

1 hit Apply

134.2177 M 1

1 hit Apply

1.28E8 1

1 hit Apply

SYNCHRONOUS 1

1 hit Apply

65.0 °C 1

1 hit Apply

0.0 °C 1

1 hit Apply

Organization (1)

128MX64 1

1 hit Apply

3-STATE 1

1 hit Apply

UNSPECIFIED 1

1 hit Apply

DIMM 1

1 hit Apply

DIMM240,40 1

1 hit Apply

RECTANGULAR 1

1 hit Apply

MICROELECTRONIC ASSEMBLY 1

1 hit Apply

Refresh Cycles (1)

8192 1

1 hit Apply

Supply Voltage-Nom (Vsup) (1)

1.8 V 1

1 hit Apply