Parametric results for: HYS64T64020GDL under DRAMs

All Filters Access Mode Access Time-Max Additional Feature Clock Frequency-Max (fCLK) I/O Type JESD-30 Code Manufacturer Memory Density Memory IC Type Memory Width Number of Functions Number of Ports Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Package Body Material Package Code Package Equivalence Code Package Shape Package Style Refresh Cycles Supply Voltage-Nom (Vsup) Access Mode (1)

DUAL BANK PAGE BURST 3

5 hits Apply

Access Time-Max (2)

500 ps 2 600 ps 2

Min (ns) - Max (ns)

5 hits Apply

AUTO/SELF REFRESH 3

5 hits Apply

Clock Frequency-Max (fCLK) (2)

200 MHz 2 267 MHz 2

Min (MHz) - Max (MHz)

5 hits Apply

COMMON 4

5 hits Apply

R-PDMA-N200 2 R-XDMA-N200 3

5 hits Apply

Manufacturer (2)

Infineon Technologies AG 3 Qimonda AG 2

5 hits Apply

Memory Density (1)

4.295 Gbit 5

5 hits Apply

DDR DRAM MODULE 5

5 hits Apply

Memory Width (1)

64 5

5 hits Apply

1.0 3

5 hits Apply

1 3

5 hits Apply

200 5

5 hits Apply

67.1089 M 5

5 hits Apply

6.4E7 5

5 hits Apply

SYNCHRONOUS 3

5 hits Apply

65.0 °C 4 85.0 °C 1

Min (°C) - Max (°C)

5 hits Apply

0.0 °C 5

5 hits Apply

Organization (1)

64MX64 5

5 hits Apply

3-STATE 4

5 hits Apply

PLASTIC/EPOXY 2 UNSPECIFIED 3

5 hits Apply

DIMM 5

5 hits Apply

DIMM200,24 4

5 hits Apply

RECTANGULAR 5

5 hits Apply

MICROELECTRONIC ASSEMBLY 5

5 hits Apply

Refresh Cycles (1)

8192 4

5 hits Apply

Supply Voltage-Nom (Vsup) (1)

1.8 V 5

5 hits Apply