Parametric results for: HYS72T128001HR-5-A under DRAMs

All Filters Access Mode Access Time-Max Additional Feature Clock Frequency-Max (fCLK) I/O Type JESD-30 Code Manufacturer Memory Density Memory IC Type Memory Width Moisture Sensitivity Level Number of Functions Number of Ports Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Package Body Material Package Code Package Equivalence Code Package Shape Package Style Refresh Cycles Supply Voltage-Nom (Vsup) Access Mode (1)

SINGLE BANK PAGE BURST 2

2 hits Apply

Access Time-Max (1)

600 ps 2

2 hits Apply

AUTO/SELF REFRESH 2

2 hits Apply

Clock Frequency-Max (fCLK) (1)

200 MHz 1

2 hits Apply

COMMON 1

2 hits Apply

R-XDMA-N240 2

2 hits Apply

Manufacturer (2)

Infineon Technologies AG 1 Qimonda AG 1

2 hits Apply

Memory Density (1)

9.6637 Gbit 2

2 hits Apply

DDR DRAM MODULE 2

2 hits Apply

Memory Width (1)

72 2

2 hits Apply

3 1

2 hits Apply

1.0 2

2 hits Apply

1 2

2 hits Apply

240 2

2 hits Apply

134.2177 M 2

2 hits Apply

1.28E8 2

2 hits Apply

SYNCHRONOUS 2

2 hits Apply

55.0 °C 2

2 hits Apply

0.0 °C 2

2 hits Apply

Organization (1)

128MX72 2

2 hits Apply

3-STATE 1

2 hits Apply

UNSPECIFIED 2

2 hits Apply

DIMM 2

2 hits Apply

DIMM240,40 1

2 hits Apply

RECTANGULAR 2

2 hits Apply

MICROELECTRONIC ASSEMBLY 2

2 hits Apply

Refresh Cycles (1)

8192 1

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

1.8 V 2

2 hits Apply