Parametric results for: IDT7281L12PA under FIFOs

All Filters Access Time-Max Additional Feature Clock Frequency-Max (fCLK) Cycle Time JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Moisture Sensitivity Level Number of Functions Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Output Enable Package Body Material Package Code Package Equivalence Code Package Shape Package Style Supply Voltage-Nom (Vsup) Access Time-Max (1)

12 ns 4

4 hits Apply

RETRANSMIT 4

4 hits Apply

Clock Frequency-Max (fCLK) (1)

50 MHz 3

4 hits Apply

Cycle Time (1)

20 ns 4

4 hits Apply

R-PDSO-G56 4

4 hits Apply

e0 2 e3 2

4 hits Apply

14 mm 4

4 hits Apply

Manufacturer (1)

Integrated Device Technology Inc 4

4 hits Apply

Memory Density (1)

4.608 kbit 4

4 hits Apply

OTHER FIFO 3

4 hits Apply

Memory Width (1)

9 4

4 hits Apply

1 4

4 hits Apply

1.0 1 2.0 3

Min - Max

4 hits Apply

56 4

4 hits Apply

512 words 4

4 hits Apply

512.0 4

4 hits Apply

ASYNCHRONOUS 4

4 hits Apply

70.0 °C 4

4 hits Apply

0.0 °C 4

4 hits Apply

Organization (1)

512X9 4

4 hits Apply

3-STATE 4

4 hits Apply

NO 4

4 hits Apply

PLASTIC/EPOXY 4

4 hits Apply

TSSOP 4

4 hits Apply

TSSOP56,.3,20 3

4 hits Apply

RECTANGULAR 4

4 hits Apply

SMALL OUTLINE, THIN PROFILE, SHRINK PITCH 4

4 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 4

4 hits Apply