Parametric results for: WED3DG6419V-D2 under DRAMs

All Filters Access Mode Additional Feature Clock Frequency-Max (fCLK) I/O Type JESD-30 Code Manufacturer Memory Density Memory IC Type Memory Width Number of Functions Number of Ports Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Package Body Material Package Code Package Equivalence Code Package Shape Package Style Refresh Cycles Supply Voltage-Nom (Vsup) Access Mode (1)

FOUR BANK PAGE BURST 6

6 hits Apply

AUTO/SELF REFRESH 6

6 hits Apply

Clock Frequency-Max (fCLK) (2)

100 MHz 1 133 MHz 2

Min (MHz) - Max (MHz)

6 hits Apply

COMMON 3

6 hits Apply

R-XDMA-N168 6

6 hits Apply

Manufacturer (2)

Microsemi Corporation 3 White Electronic Designs Corp 3

6 hits Apply

Memory Density (1)

1.0737 Gbit 6

6 hits Apply

SYNCHRONOUS DRAM MODULE 6

6 hits Apply

Memory Width (1)

64 6

6 hits Apply

1.0 6

6 hits Apply

1 6

6 hits Apply

168 6

6 hits Apply

16.7772 M 6

6 hits Apply

1.6E7 6

6 hits Apply

SYNCHRONOUS 6

6 hits Apply

70.0 °C 6

6 hits Apply

0.0 °C 6

6 hits Apply

Organization (1)

16MX64 6

6 hits Apply

3-STATE 3

6 hits Apply

UNSPECIFIED 6

6 hits Apply

DIMM 6

6 hits Apply

DIMM168 3

6 hits Apply

RECTANGULAR 6

6 hits Apply

MICROELECTRONIC ASSEMBLY 6

6 hits Apply

Refresh Cycles (1)

4096 3

6 hits Apply

Supply Voltage-Nom (Vsup) (1)

3.3 V 6

6 hits Apply