Parametric results for: cy7c09369v12ac under SRAMs

All Filters Access Time-Max Additional Feature Clock Frequency-Max (fCLK) I/O Type JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Moisture Sensitivity Level Number of Functions Number of Ports Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Output Enable Package Body Material Package Code Package Equivalence Code Package Shape Package Style Supply Voltage-Nom (Vsup) Access Time-Max (1)

12 ns 1

1 hit Apply

FLOW-THROUGH OR PIPELINED ARCHITECTURE 1

1 hit Apply

Clock Frequency-Max (fCLK) (1)

50 MHz 1

1 hit Apply

COMMON 1

1 hit Apply

S-PQFP-G100 1

1 hit Apply

e0 1

1 hit Apply

14 mm 1

1 hit Apply

Manufacturer (1)

Cypress Semiconductor 1

1 hit Apply

Memory Density (1)

294.912 kbit 1

1 hit Apply

MULTI-PORT SRAM 1

1 hit Apply

Memory Width (1)

18 1

1 hit Apply

3 1

1 hit Apply

1.0 1

1 hit Apply

2 1

1 hit Apply

100 1

1 hit Apply

16.384 k 1

1 hit Apply

16000.0 1

1 hit Apply

SYNCHRONOUS 1

1 hit Apply

70.0 °C 1

1 hit Apply

0.0 °C 1

1 hit Apply

Organization (1)

16KX18 1

1 hit Apply

3-STATE 1

1 hit Apply

YES 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

LFQFP 1

1 hit Apply

QFP100,.63SQ,20 1

1 hit Apply

SQUARE 1

1 hit Apply

FLATPACK, LOW PROFILE, FINE PITCH 1

1 hit Apply

Supply Voltage-Nom (Vsup) (1)

3.3 V 1

1 hit Apply