Parametric results for: HYS64T256022EDL under DRAMs

All Filters Access Mode Access Time-Max Additional Feature Clock Frequency-Max (fCLK) I/O Type JESD-30 Code Manufacturer Memory Density Memory IC Type Memory Width Moisture Sensitivity Level Number of Functions Number of Ports Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Package Body Material Package Code Package Equivalence Code Package Shape Package Style Refresh Cycles Supply Voltage-Nom (Vsup) Access Mode (1)

DUAL BANK PAGE BURST 5

5 hits Apply

Access Time-Max (3)

400 ps 2 450 ps 2 500 ps 1

Min (ns) - Max (ns)

5 hits Apply

AUTO/SELF REFRESH 5

5 hits Apply

Clock Frequency-Max (fCLK) (3)

266 MHz 1 333 MHz 2 400 MHz 2

Min (MHz) - Max (MHz)

5 hits Apply

COMMON 5

5 hits Apply

R-XDMA-N200 5

5 hits Apply

Manufacturer (1)

Qimonda AG 5

5 hits Apply

Memory Density (1)

17.1799 Gbit 5

5 hits Apply

DDR DRAM MODULE 5

5 hits Apply

Memory Width (1)

64 5

5 hits Apply

3 5

5 hits Apply

1.0 5

5 hits Apply

1 5

5 hits Apply

200 5

5 hits Apply

268.4355 M 5

5 hits Apply

2.56E8 5

5 hits Apply

SYNCHRONOUS 5

5 hits Apply

65.0 °C 5

5 hits Apply

0.0 °C 5

5 hits Apply

Organization (1)

256MX64 5

5 hits Apply

3-STATE 5

5 hits Apply

UNSPECIFIED 5

5 hits Apply

DIMM 5

5 hits Apply

DIMM200,24 5

5 hits Apply

RECTANGULAR 5

5 hits Apply

MICROELECTRONIC ASSEMBLY 5

5 hits Apply

Refresh Cycles (1)

8192 5

5 hits Apply

Supply Voltage-Nom (Vsup) (1)

1.8 V 5

5 hits Apply